Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis

In this paper, using calibrated TCAD simulations, we demonstrate how the performance of a Tunneling FET (TFET) can be improved by using a new phenomenon called drain induced barrier widening (DIBW) at the source-channel junction. Our results indicate that TFETs in which DIBW dominates exhibit a stee...

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Autores principales: Mamidala Karthik Ram, Neha Tiwari, Dawit Burusie Abdi, Sneh Saurabh
Formato: article
Lenguaje:EN
Publicado: IEEE 2021
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Acceso en línea:https://doaj.org/article/fd1719d153a84db3884bfc9a7ef41dde
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Sumario:In this paper, using calibrated TCAD simulations, we demonstrate how the performance of a Tunneling FET (TFET) can be improved by using a new phenomenon called drain induced barrier widening (DIBW) at the source-channel junction. Our results indicate that TFETs in which DIBW dominates exhibit a steep subthreshold swing (&#x2248;35 mV/dec) and a low OFF-state current (<inline-formula> <tex-math notation="LaTeX">$\approx 10^{-16}\text{A}/\mu \text{m}$ </tex-math></inline-formula>) without affecting the ON-state current. We also show that TFETs exhibit a reverse short channel effect due to an increase in the tunneling width at the source-channel junction.