Material-Device-Circuit Co-optimization of 2D Material based FETs for Ultra-Scaled Technology Nodes

Abstract Two-dimensional (2D) material based FETs are being considered for future technology nodes and high performance logic applications. However, a comprehensive assessment of 2D material based FETs has been lacking for high performance logic applications considering appropriate system level figu...

Description complète

Enregistré dans:
Détails bibliographiques
Auteurs principaux: Tarun kumar Agarwal, Bart Soree, Iuliana Radu, Praveen Raghavan, Giuseppe Iannaccone, Gianluca Fiori, Wim Dehaene, Marc Heyns
Format: article
Langue:EN
Publié: Nature Portfolio 2017
Sujets:
R
Q
Accès en ligne:https://doaj.org/article/3aba0caa895f420b8b71b17ac1ba4519
Tags: Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!