Material-Device-Circuit Co-optimization of 2D Material based FETs for Ultra-Scaled Technology Nodes
Abstract Two-dimensional (2D) material based FETs are being considered for future technology nodes and high performance logic applications. However, a comprehensive assessment of 2D material based FETs has been lacking for high performance logic applications considering appropriate system level figu...
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Autores principales: | Tarun kumar Agarwal, Bart Soree, Iuliana Radu, Praveen Raghavan, Giuseppe Iannaccone, Gianluca Fiori, Wim Dehaene, Marc Heyns |
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Formato: | article |
Lenguaje: | EN |
Publicado: |
Nature Portfolio
2017
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Materias: | |
Acceso en línea: | https://doaj.org/article/3aba0caa895f420b8b71b17ac1ba4519 |
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