Heteroepitaxial vertical perovskite hot-electron transistors down to the monolayer limit
Two-dimensional heterostructures combined with vertical geometries trigger superior functionalities in fundamental studies and applications. Here, the authors report vertical perovskite hot-electron transistors integrated with perovskite one-dimensional edge contacts down to the monolayer limit.
Guardado en:
Autores principales: | Brian S. Y. Kim, Yasuyuki Hikita, Takeaki Yajima, Harold Y. Hwang |
---|---|
Formato: | article |
Lenguaje: | EN |
Publicado: |
Nature Portfolio
2019
|
Materias: | |
Acceso en línea: | https://doaj.org/article/74ea721343ef4cffb39fe57d98dc8c3f |
Etiquetas: |
Agregar Etiqueta
Sin Etiquetas, Sea el primero en etiquetar este registro!
|
Ejemplares similares
-
Top-down GaN nanowire transistors with nearly zero gate hysteresis for parallel vertical electronics
por: Muhammad Fahlesa Fatahilah, et al.
Publicado: (2019) -
Striped nanoscale phase separation at the metal–insulator transition of heteroepitaxial nickelates
por: G. Mattoni, et al.
Publicado: (2016) -
Room-temperature ferroelectricity in MoTe2 down to the atomic monolayer limit
por: Shuoguo Yuan, et al.
Publicado: (2019) -
Planar and van der Waals heterostructures for vertical tunnelling single electron transistors
por: Gwangwoo Kim, et al.
Publicado: (2019) -
Author Correction: Planar and van der Waals heterostructures for vertical tunnelling single electron transistors
por: Gwangwoo Kim, et al.
Publicado: (2019)