High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications
In this study, the deuterium passivation effect of silicon nitride (Si<sub>3</sub>N<sub>4</sub>) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si<sub>3</sub>N<sub>4<...
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MDPI AG
2021
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oai:doaj.org-article:9de899bdf1e04bddb3e48ab30e7ddd082021-11-25T18:23:04ZHigh Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications10.3390/mi121113162072-666Xhttps://doaj.org/article/9de899bdf1e04bddb3e48ab30e7ddd082021-10-01T00:00:00Zhttps://www.mdpi.com/2072-666X/12/11/1316https://doaj.org/toc/2072-666XIn this study, the deuterium passivation effect of silicon nitride (Si<sub>3</sub>N<sub>4</sub>) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si<sub>3</sub>N<sub>4</sub> as a charge trapping layer, deuterium (D<sub>2</sub>) high pressure annealing (HPA) was applied after Si<sub>3</sub>N<sub>4</sub> deposition. Flat band voltage shifts (ΔV<sub>FB</sub>) in data retention mode were compared by CV measurement after D<sub>2</sub> HPA, which shows that the memory window decreases but charge loss in retention mode after program is suppressed. Trap energy distribution based on thermal activated retention model is extracted to compare the trap density of Si<sub>3</sub>N<sub>4</sub>. D<sub>2</sub> HPA reduces the amount of trap densities in the band gap range of 1.06–1.18 eV. SIMS profiles are used to analyze the D<sub>2</sub> profile in Si<sub>3</sub>N<sub>4</sub>. The results show that deuterium diffuses into the Si<sub>3</sub>N<sub>4</sub> and exists up to the Si<sub>3</sub>N<sub>4</sub>-SiO<sub>2</sub> interface region during post-annealing process, which seems to lower the trap density and improve the memory reliability.Jae-Young SungJun-Kyo JeongWoon-San KoJun-Ho ByunHi-Deok LeeGa-Won LeeMDPI AGarticledeuterium high pressure annealflash memorysilicon nitrideretentionMechanical engineering and machineryTJ1-1570ENMicromachines, Vol 12, Iss 1316, p 1316 (2021) |
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deuterium high pressure anneal flash memory silicon nitride retention Mechanical engineering and machinery TJ1-1570 |
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deuterium high pressure anneal flash memory silicon nitride retention Mechanical engineering and machinery TJ1-1570 Jae-Young Sung Jun-Kyo Jeong Woon-San Ko Jun-Ho Byun Hi-Deok Lee Ga-Won Lee High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| description |
In this study, the deuterium passivation effect of silicon nitride (Si<sub>3</sub>N<sub>4</sub>) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si<sub>3</sub>N<sub>4</sub> as a charge trapping layer, deuterium (D<sub>2</sub>) high pressure annealing (HPA) was applied after Si<sub>3</sub>N<sub>4</sub> deposition. Flat band voltage shifts (ΔV<sub>FB</sub>) in data retention mode were compared by CV measurement after D<sub>2</sub> HPA, which shows that the memory window decreases but charge loss in retention mode after program is suppressed. Trap energy distribution based on thermal activated retention model is extracted to compare the trap density of Si<sub>3</sub>N<sub>4</sub>. D<sub>2</sub> HPA reduces the amount of trap densities in the band gap range of 1.06–1.18 eV. SIMS profiles are used to analyze the D<sub>2</sub> profile in Si<sub>3</sub>N<sub>4</sub>. The results show that deuterium diffuses into the Si<sub>3</sub>N<sub>4</sub> and exists up to the Si<sub>3</sub>N<sub>4</sub>-SiO<sub>2</sub> interface region during post-annealing process, which seems to lower the trap density and improve the memory reliability. |
| format |
article |
| author |
Jae-Young Sung Jun-Kyo Jeong Woon-San Ko Jun-Ho Byun Hi-Deok Lee Ga-Won Lee |
| author_facet |
Jae-Young Sung Jun-Kyo Jeong Woon-San Ko Jun-Ho Byun Hi-Deok Lee Ga-Won Lee |
| author_sort |
Jae-Young Sung |
| title |
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| title_short |
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| title_full |
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| title_fullStr |
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| title_full_unstemmed |
High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications |
| title_sort |
high pressure deuterium passivation of charge trapping layer for nonvolatile memory applications |
| publisher |
MDPI AG |
| publishDate |
2021 |
| url |
https://doaj.org/article/9de899bdf1e04bddb3e48ab30e7ddd08 |
| work_keys_str_mv |
AT jaeyoungsung highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications AT junkyojeong highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications AT woonsanko highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications AT junhobyun highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications AT hideoklee highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications AT gawonlee highpressuredeuteriumpassivationofchargetrappinglayerfornonvolatilememoryapplications |
| _version_ |
1718411275225006080 |